Current Advances in Nanomaterial-associated Micro and Nano-devices for SARS-CoV-2 Detection

COVID-19 spread rapidly around the world in 18 months, with various forms of variants caused by severe acute respiratory syndrome (SARS-CoV). This has put pressure on the world community and created an urgent need for understanding its early occurrence through rapid, simple, cheap, and yet highly accurate diagnosis. The most widely adopted method as of today is the real-time reverse-transcriptase polymerase chain reaction. This test has shown the potential for rapid testing, but unfortunately, the test is not rapid and, in some cases, displays false negatives or false positives. The nanomaterials play an important role in creating highly sensitive systems, and have been thought to significantly improve the performance of the SARSCoV- 2 protocols. Several biosensors based on micro-and nano-sensors for SARS-CoV-2 detection have been reported, and they employ multi-dimensional hybrids on sensing surfaces with devices having different sizes and geometries. Zero-to-three-dimension nanomaterial hybrids on sensing surfaces, including nanofilm hybrids for SARS-CoV-2 detection, were employed with unprecedented sensitivity and accuracy. Furthermore, the sensors were nanofluidic and mediated high-performance SARS-CoV-2 detection. This breakthrough has brought the possibility of making a biosystem on a chip (Bio-SoC) for rapid, cheap, and point-of-care detection. This review summarises various advancements in nanomaterial-associated nanodevices and metasurface devices for detecting SARS-CoV-2.

A Silicon-Based Radio Platform for Integrated Edge Sensing and Communication Toward Sustainable Healthcare

Faced with COVID-19 and the trend of aging, it is demanding to develop an online health metrics sensing solution for sustainable healthcare. An edge radio platform owning the function of integrated sensing and communications is promising to address the challenge. Radar demonstrates the capability for noncontact healthcare with high sensitivity and excellent privacy protection. Beyond conventional radar, this article presents a unique silicon-based radio platform for health status monitoring supported by coherent frequency-modulated continuous-wave (FMCW) radar at Ku-band and communication chip. The radar chip is fabricated by a 65-nm complementary metal–oxide–semiconductor (CMOS) process and demonstrates a 1.5-GHz chirp bandwidth with a 15-GHz center frequency in 220-mW power consumption. A specific small-volume antenna with modified Vivaldi architecture is utilized for emitting and receiving radar beams. Biomedical experiments were implemented based on the radio platform cooperating with the antenna and system-on-chip (SoC) field-programmable gate array (FPGA) edge unit. An industrial, scientific, and medical (ISM)-band frequency-shift keying (FSK) communication chip in 915-MHz center frequency with microwatt-level power consumption is used to attain communications on radar-detected health information. Through unified integration of radar chip, management software, and communication unit, the integrated radio platform featuring −72-dBm sensitivity with a 500-kb/s FSK data rate is exploited to drastically empower sustainable healthcare applications.

A Novel Project-Oriented System on Chip (SoC) Design Course for Computer and Electrical Engineers

This paper describes a novel project-oriented system on chip (SoC) design course. The course is taught in the Computer Science and Engineering (CSE) Department at the University of Texas at Arlington and is offered as CSE 4356 System on Chip Design for computer engineering undergraduates, as CSE 5356 for computer engineering graduate students, and as EE 5315 for electrical engineering graduate students. It is taught as one course combining all numbers. All students are given the same lectures, course materials, assignments, and projects. Grading standards and expectations are the same for all students as well. The course in its current form was first offered in fall 2020 and was taught online due to COVID-19 restrictions. The course was offered again in fall 2021 in a traditional on-campus, in-person mode of delivery. Two seasoned educators, with more than eighty years of total teaching experience, combined to team teach the course. One also brought more than thirty years of industrial design experience to the course. SoC FPGA devices have been available for use by designers for more than 10 years and are widely used in applications that require both an embedded microcomputer and FPGA-based logic for real-time computationally-intense solutions. Such solutions require skills in C programming, HDL programming, bus topologies forming the bridge between FPGA fabric and the microprocessor space, Linux operating systems and virtualization, and kernel device driver development. The breadth of the skills that were conveyed to students necessitated a team teaching approach to leverage the diverse background of the instructors. With such a wide range of topics, one of the biggest challenges was developing a course that was approachable for a greatly varied population of students - a mix of Computer Engineering (CpE) and Electrical Engineering (EE) students at both the graduate and undergraduate level. Another, perhaps less obvious, challenge was the inherently application focus of the course, which presents challenges to many graduate students whose undergraduate degree lacked a robust hands-on design experience. Selection of an appropriate project was key to making the course effective and providing a fun learning experience for students. The projects were aligned to relevant industry applications, stressing complex modern intellectual property (IP) work flows, while still being approachable to students. The design of a universal asynchronous receiver transmitter (UART) IP module in 2020 and a serial peripheral interface (SPI) IP module in 2021 were chosen as the projects for the first two offerings of the course. The Terasic/Intel DE1-SoC development board and Intel Quartus Prime 18.1 design software were the technologies chosen for the course. The development board and basic test instruments were provided to each student in a take-home lab kit. The system on chip design course has proven to be a popular but challenging course for our undergraduate and graduate students in computer engineering and electrical engineering. The course has demonstrated that it is possible to successfully teach an advanced design-oriented course to students of varying majors, levels, educational backgrounds, and cultures. © American Society for Engineering Education, 2022.

VVC intra prediction decoder: Feature improvement and performance analysis

Nowadays, streaming applications have been in great demand, especially due to covid-19 (teleworking, online teaching, virtual reality, etc.). In addition, artificial intelligence has become widely used especially in video processing domains, so a video with high quality improves the accuracy rate of this application. To meet these needs, the Versatile Video Coding standard (VVC) has appeared to give a high compression efficiency compared to high-efficiency video coding. This norm consists of a high complexity algorithm that offers an improvement in processing time and decreases the bit rate by 50 % thanks to several new compression techniques. In this context, we propose the implementation of an intra prediction decoding chain of this standard on a system on chip. In this work, we highlight the VVC feature enhancements, we present the suitable method for VVC intra-prediction decoder implementation on the PYNQ-Z2, and we provide profiling in terms of decoding time and power consumption. As a future work, this study is helpful to distinguish the block that will be a candidate for a Hardware acceleration. © 2022 IEEE.

Implementation of an Embedded Masked Face Recognition System using Huskylens System-On-Chip Module

Globally, Facial recognition systems have been increasingly adopted, by governments, as a viable means of identification and verification in public spaces such as the airport, train stations, and stadiums. However, in the wake of the COVID-19 outbreak, the World Health Organization (WHO) declared that wearing face masks is an essential safety precaution. As a result, current facial recognition systems have difficulties recognizing faces accurately, which motivated this study. This research aims to implement an embedded masked face recognition system using the HuskyLens SoC module to identify people, even while wearing a face mask. The developed method was actualized using the Kendryte K210 chip embedded in the HuskyLens module. This system-on-chip design was integrated with other peripherals using an Arduino Pro-mini board. The results of testing and evaluating the system's performance show that the system's facial recognition accuracy with masked and without masks faces was 90% and 95%, respectively. Implementing this solution in our environment would enable accurate real-time recognition of masked and unmasked faces © 2022 IEEE.

Non-contact Based Recognition System in Low Power SoC Board using Raspberry pi for ATM Applications during COVID

COVID is a deadly virus whose rate of infection is severely varying day by day. It affects larger crowd by changing its structure rapidly. To safeguard people, government announced many restrictions to the public access. During this pandemic, people are advised to be in non- contact mode so as to avoid the spread of deadly virus. But getting money in ATM machines are mandatory to buy necessary things and medicines. The access to ATM with ATM cards may cause the spread of deadly disease. Thus a better replacement is required these days. The proposed paper work, explains on the new projected algorithm with the help of Raspberry pi and Soc board to develop a non-contact based recognition system. Also the paper compares the projected system with the existing finger print access to ATM machines. The proposed system is developed with Raspberry pi and Soc board. A non-contact based recognition system is projected so as to reduce the spread of deadly virus. The person who wants to withdraw money from ATM has to stand before the machine. The face will be recognized by the machine in comparison with the database stored. After face been recognized, then the list of banks in which the person has accounts will be projected on the screen. The person can choose the bank from which he/she can withdraw money through voice control access. This method provides a non-contact based access to ATM machines and also supports for single centralized access to multiple banks. This reduces the effort of access to banks during pandemic. The main benefit of the projected system is to reduce the theft happens in the ATM machines. Also a guardian access with the customer approval is proposed in the system for easy access to the banks. © 2021 IEEE.

An Effective approach for implementing COVID-19 CT Lung Segmentation using Low-Cost System on Chip

Computer vision techniques always had played a salient role in numerous medical fields, especially in image diagnosis. Amidst a global pandemic situation, one of the archetypal methods assisting healthcare professionals in diagnosing various types of lung cancers, heart diseases, and COVID-19 infection is the Computed Tomography (CT) medical imaging technique. Segmentation of Lung and Infection with high accuracy in COVID-19 CT scans can play a vital role in the prognosis and diagnosis of a mass population of infected patients. Most of the existing works are predominately based on large private data sets that are practically impossible to obtain during a pandemic situation. Moreover, it is difficult to compare the segmentation methods as the data set are obtained in various geographical areas and developed and implemented in different environments. To help the current global pandemic situation, we are proposing a highly data-efficient method that gets trained on 20 expert annotated COVID-19 cases. To increase the efficiency rate further, the proposed model has been implemented on NVIDIA-Jetson Nano (System-on-Chip) to completely exploit the GPU performance for a medical application machine learning module. To compare the results, we tested the performance with conventional U-Net architecture and calculated the performance metrics. The proposed state-of-art method proves better than the conventional architecture delivering a Dice Similarity Coefficient of 99%. © 2021 IEEE.